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A programmable logic device or PLD is an electronic component used to build digital circuits. Unlike a logic gate, which has a fixed function, a PLD has an undefined function at the time of manufacture. Before the PLD can be used in a circuit it must be programmed.
It is impossible to discuss PLD technology without mentioning some of the companies involved in its development. However, it is not the purpose of this article to list all manufacturers of PLDs. Inclusion or omission of a particular company from this article is intended as neither a recommendation nor a criticism.
Before PLDs were invented, read-only memory (ROM) chips were used to create arbitrary combinatorial logic functions of a number of inputs. Consider a ROM with m inputs (the address lines) and n outputs (the data lines). When used as a memory, the ROM contains <math>2^m<math> words of n bits each. Now imagine that the inputs are driven not by an m-bit address, but by m independent logic signals. Theoretically, there are <math>2^m<math> possible Boolean functions of these m signals, but the structure of the ROM allows just n of these functions to be produced at the output pins. The ROM therefore becomes equivalent to n separate logic circuits, each of which generates a chosen function of the m inputs.
The advantage of using a ROM in this way is that any conceivable function of the m inputs can be made to appear at any of the n outputs, making this the most general-purpose combinatorial logic device available. Also, PROMs (programmable ROMs), EPROMs (ultraviolet-erasable PROMs) and EEPROMs (electrically erasable PROMs) are available that can be programmed using a standard PROM programmer without requiring specialised hardware or software. However, there are several disadvantages: they are usually much slower than dedicated logic circuits, they consume more power, and because only a small fraction of their capacity is used in any one application, they make an inefficient use of space. Also, they cannot easily be used for sequential logic, because they contain no flip-flops.
The first PALs (Programmable Array Logic) for the commercial market were introduced by MMI (Monolithic Memories, Inc.), although IBM produced similar devices for internal use in the mid-1970s. Early PALs were 20-pin DIP (dual inline package) components fabricated in bipolar silicon transistor technology with nichrome programming fuses. The 16L8 and 16R8 were popular members of the product family. The devices have fixed-or, programmable-and-plane arrays of transistor cells to implement 'sum-of-products' binary logic equations for each of the outputs in terms of the inputs and either synchronous or asynchronous feedback from the outputs. Before PALs were introduced digital designers would use SSI (small-scale integration) components, such as 7400 series nand gates and D-flipflops. One PAL device would typically replace dozens of such 'discrete' logic packages, so the SSI business went into decline as the PAL business took off. PALs were used advantageously in many products, such as minicomputers, as documented in the best-selling book "The Soul of a New Machine."
Early PALs were programmed using PALASM language files (converted by a compiler into JEDEC ASCII/hexadecimal files) and a special electronic programming system available from either the manufacturer or a third-party, such as DATAIO. Gang programmers were used when more than just a few parts were needed and for large volumes the manufacturer would fabricate a custom metal mask for manufacturing so electrical programming could be eliminated to reduce cost. PALASM was used to express boolean equations for the outputs pins in a text file which was then converted to the 'fuse map' file for the programming system using a vendor-supplied program; later the option of translation from schematics became common, and later still, 'fuse maps' could be 'synthesized' from an HDL (hardware description language,) such as Verilog.
After MMI succeeded with the 20-pin PAL parts, AMD introduced the 24-pin 22V10 PAL with additional features. After buying out MMI (1987?), AMD spun off a consolidated operation as Vantis, and that business was acquired by Lattice Semiconductor in 1999.
An innovation of the PAL was the generic array logic device, or GAL, invented by Lattice Semiconductor Inc. This device has the same logical properties as the PAL but can be erased and reprogrammed. The GAL is very useful in the prototyping stage of a design, when any bugs in the logic can be corrected by reprogramming. GALs are programmed and reprogrammed using a PAL programmer.
A similar device called a PEEL (programmable electrically erasable logic) was introduced by the International CMOS Technology (ICT) corporation.
PALs and GALs are available only in small sizes, equivalent to a few hundred logic gates. For bigger logic circuits, complex PLDs or CPLDs can be used. These contain the equivalent of several PALs linked by programmable interconnections, all in one integrated circuit. CPLDs can replace thousands, or even hundreds of thousands, of logic gates.
Some CPLDs are programmed using a PAL programmer, but this method becomes inconvenient for devices with hundreds of pins. A second method of programming is to solder the device to its printed circuit board, then feed it with a serial data stream from a personal computer. The CPLD contains a circuit that decodes the data stream and configures the CPLD to perform its specified logic function.
Each manufacturer has a proprietary name for this programming system. For example, Lattice calls it "in-system programming". However, these proprietary systems are beginning to give way to a standard from the Joint Test Action Group (JTAG).
While PALs were busy developing into GALs and CPLDs (all discussed above), a separate stream of development was happening. This type of device is based on gate-array technology and is called the field-programmable gate array (FPGA). An early example of an FPGA is the 82s100 by Signetics introduced in the late 1970s.
FPGAs use a grid of logic gates, similar to that of an ordinary gate array, but the programming is done by the customer, not by the manufacturer. The term "field-programmable" may be obscure to some, but "field" is just an engineering term for the world outside the factory, where customers live.
FPGAs are usually programmed after being soldered down to the circuit board, in the same way as larger CPLDs. In most larger FPGAs the configuration is volatile, and must be re-loaded into the device whenever power is applied or different functionality is required.
FPGAs and CPLDs are often equally good choices for a particular task. Sometimes the decision is more an economic one than a technical one, or may depend on the engineer's personal preference and history.
There is much interest in reconfigurable systems at present. These are microprocessor circuits that contain some fixed functions and other functions that can be altered by code running on the processor. Designing self-altering systems will require engineers to learn new methods, and will probably require new software tools to be developed.
PLDs are being sold now that contain a microprocessor with a fixed function (the so-called core) surrounded by programmable logic. These devices allow the designer to concentrate on adding new features to his design without having to worry about making the microprocessor work.
A PLD is a combination of a logic device and a memory device. The memory is used to store the pattern that was given to the chip during programming. Most of the methods for storing data in an integrated circuit have been adapted for use in PLDs. These include:
Silicon antifuses are the storage elements used in the PAL, the first type of PLD. These are connections that are made by applying a voltage across a modified area of silicon inside the chip. They are called antifuses because they work in the opposite way to normal fuses, which begin life as connections until they are broken by an electric current.
SRAM, or static RAM, is a volatile type of memory, meaning that its contents are lost each time the power is switched off. SRAM-based PLDs therefore have to be programmed every time the circuit is switched on. This is usually done automatically by another part of the circuit.
Flash memory is non-volatile, retaining its contents even when the power is switched off. It can be erased and reprogrammed as required. This makes it useful for PLD memory.
An EPROM cell is a MOS (metal-oxide-semiconductor) transistor that can be switched on by trapping an electric charge permanently on its gate electrode. This is done by a PAL programmer. The charge remains for many years and can only be removed by exposing the chip to strong ultraviolet light in a device called an EPROM eraser.
As mentioned in the "PAL" section above, JEDEC files are usually too complex to create by hand, so a computer program is used to generate them. This program is called a logic compiler, and is analogous to a software compiler. The languages used as source code for logic compilers are called hardware description languages, or HDLs. ABEL and VHDL are two such languages.
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