PCI Configuration Space

One of the major improvements PCI had over other I/O architectures was its configuration mechanism. In addition to the normal memory-mapped and port spaces, it has configuration space. This is 256 bytes that is addressable by knowing the PCI bus, device and function numbers for the device. The first 64 bytes of configuration space are standardised; the remainder are avilable for vendor-defined purposes.

In order to address a device through port space or memory space, the BIOS or OS will program the Base Address Registers (commonly called BARs). Each non-bridge device has up to 6 BARs, each of which will respond to certain areas of port or memory space.

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